IcySoC
Two microchips implementing four core PULP platforms can be seen in the picture. The big chip is realized using the EM-Marin 180nm technology and the smaller one in UMC 65nm technology.
The goal of the project is to combine energy efficient systems working in the sub-/near- threshold domain with approximate computing principles where the accuracy of the operations are traded off for lower energy consumption and/or circuit area. By combining the two methods, we investigate how much we can improve the performance of digital circuits, especially in the Internet of Things domain. IcySoC is a projected evaluated by the Swiss NSF and funded by Nano-Tera.ch and is performed in collaboration with the external pageTelecommunication Circuits Laboratory and external pageIntegrated Circuits Laboratory of EPFL, external pageCSEM and external pageEM Marin Microlectronic.