ACiD2002:
Second ACiD-WG Workshop of the European Commision's fifth framework programme
Multi-point Interconnect for Globally-Asynchronous Locally-Synchronous Systems
Abstract
GALS makes it possible to take advantage of the
industry-standard synchronous design methodology
within individual clock domains and of self-timed operation
across clock boundaries. The self-timed approach
does away with the need to time-align the operation
of all modules within the framework of a common
base clock period. Instead, each module is driven
from a local pausable clock generator in its self-timed
wrapper being controlled such as to prevent any timing
violations from occurring within the Locally
Synchronous Island's data interface.
Our first GALS realization supported only point-to-point
connections. Yet, a shared system bus or another
form of multi-point data exchange is a key necessity
of a modern System-on-Chip (SoC) design as
it offers the desired modularity and extendibility. Several
interconnection topologies are being considered to
add to the current GALS technique. Two of them are
studied in more detail here.
Authors
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